1. Field of the Invention
The present invention relates to a semiconductor device.
2. Description of the Prior Art
In a field of a semiconductor integrated circuit device in recent years, high integration owing to progress of a microfabrication technology has been increasingly accelerated in conjunction with a competition between semiconductor makers. At the same time, cost reduction is also an imperative for these semiconductor makers, and not only in a field of a general-purpose memory, such as general-purpose DRAM and synchronous DRAM, but also in a field of a system LSI where a microprocessor, ASIC, custom logic or the like and a memory are built into one chip, in order to satisfy above imperative, a method of improving a yield by employing a redundant repair technology using a fuse in which a faulty memory cell generated in a manufacturing step is replaced with a spare memory cell has become important. Meanwhile, as an application technology, it is employed to adjust variation in electrical characteristics in manufacturing steps of a device which is represented by a supply voltage conversion circuit by means of applying a redundant repair technology in which above fuse or the like is utilized. Further, like a field of the present invention, it is also proposed a technology in which above fuse element is replaced with a nonvolatile memory device constituted of a CMOS device which does not require physical processing and is electrically readable and writable (2001 IEEE International Solid-State Circuits Conference P380, 381, 467, 468).
By replacing the conventional fuse element with the CMOS device, physical processing will not be required, so that there is achieved an advantage on a circuit area that a layer on the fuse element may be utilized as an interconnection area.
However, since the CMOS device has required application of a high voltage for rewriting, it has been necessary to lay out a power supply interconnection so that the high voltage has been applied thereto from an external source outside the semiconductor device, and it has therefore been necessary to lay out the semiconductor devices so that interconnections other than that and semiconductor circuits adjacent to that interconnection path have not been influenced by the high voltage, that has resulted in constraints on the layout.